Photos: Intel's Silverthorne, Tukwila 
Published: 05 Feb 2008 16:28 GMT
Gain-cell on-chip DRAM
By adopting a novel configuration, Intel has made dynamic memory that can contend with static memory for speed and power while being a lot denser – ideal for putting large amounts of cache right next to cores on many-core architectures. This 65nm design can manage 2-nanosecond access times and 128GB/s throughput, and Intel says there's no reason it can't scale to 45nm with even better results.
Photo credit: Intel

















