Inside Intel's Penryn
Published: 12 Nov 2007
Power consumption
As may be expected, the modest (but useful) performance increase of the underlying transistor technology is overshadowed by its much superior use of power. To make the most of this, Intel has added a new Deep Power Down (DPD) mode to the previous four low-power states in the 65nm designs. In DPD mode, the processor dumps almost its entire state into a special 8KB memory powered by the I/O voltage supply, and then drops the voltage in the rest of the core to a very low setting. Everything stops, all data outside the special memory is lost and the power consumption drops to under 200 milliwatts.
The reason that Intel doesn't just turn off the power to the core completely is that if it did, it would take too long to recharge the chip when it's time to turn back on. When that time comes, the chip follows exactly the same procedure as it does when turning on from cold or after a hard reset: however, it also checks the state of the internal memory and, if it realises it's coming back from deep sleep, restores everything to where it was immediately beforehand.
Deep Power Down (DPD) is a new low-power state — the lowest of five in the Penryn architecture. Only mobile variants currently use it, though.
The decision to keep a few hundred millivolts on the chip during deep sleep means the chip can effectively save power even if it goes into Deep Power Down mode every three milliseconds or so — the energy needed to recharge it is such that any more often than that, it actually costs more power to make the journey there and back than is saved. Intel claims that with Deep Power Down enabled and used, the processor can save up to 44 percent during normal office tasks, and with an exit latency of around 150 to 200 microseconds it has little impact on perceived responsiveness. So far, although the circuitry is present on all Penryn variants, it's only enabled for mobile parts, primarily because only the mobile chipset, Santa Rosa, supports it.
Anywhere the designers could save power, they did. For example, although Penryn is a 64-bit chip it spends a lot of its time doing 32-bit operations because they make up the vast majority of existing software. Whenever possible, therefore, the chip turns off the upper 32 bits of the 64-bit data path, isolating them from power — or the upper 48 bits if only 16 bits are in use; the same idea works at all levels, with entire areas of the chip being disabled through power-switching transistors when not in use, even if only very temporarily.
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